Offtopic is offtopic, but RISC-V is one of those subjects that we simply can't avoid, even if we're talking about 32 or 64 bits here.

Those who have worked on their own CPU, their own Instruction Set Architecture, their own simulator, the associated hardware, and their own divorce, will appreciate RISC-V.

The different incarnations of the open ISA range from I-can-still-fit-this-all-in-my-brain™ to actually-performant, and particularly the first variant is (for obvious reasons) interesting for hobbyists. Especially since, thanks to the compiler and linker chain, high-level languages like C and C++ can make their way onto the own creation.

Feeling like learning this summer? ☀️

Antonio Guimarães, to be found on github, is certainly not the only mind behind the following project, but at least the one who offers his github account for issues.

The introductory book on RISC-V Assembly by Prof. Edson Borin can be found completely free of charge on riscv-programming.org/. Additionally, there is a simulator that runs in the browser, and two examples, whose code you can compile and link locally with the appropriate clang and ldd, and then run in the simulator.

The whole package is convincing. Not only due to the quality but especially because you pay for this wealth of knowledge with nothing but a little of your own time.